ΧΡΥΣOΣΤΟΜΟΣ ΝΙΚOΠΟΥΛΟΣ
ΝΙΚΌΠΟΥΛΟΣ ΧΡΥΣΌΣΤΟΜΟΣ
NICOPOULOS CHRYSOSTOMOS
...
ASSISTANT PROFESSOR
Department of Electrical and Computer Engineering
Green Park
91, Aglantzias Ave.
108 Green Park
+357 22 89 21 99
+357 22 89 50 73
www.multical.ece.ucy.ac.cy/nicopoulos/

Προσωπικό Προφίλ

Ο Δρ. Χρυσόστομος Νικόπουλος είναι Επίκουρος Καθηγητής στο τμήμα ΗΜΜΥ του Πανεπιστημίου Κύπρου. Είναι κάτοχος διπλώματος Ηλεκτρολόγου Μηχανικού (2003) από το Pennsylvania State University, USA, και Διδακτορικού διπλώματος Ηλεκτρολόγου Μηχανικού (με ειδίκευση στην Μηχανική Υπολογιστών, 2007) από το ίδιο πανεπιστήμιο. Η διδακτορική διατριβή του Δρ. Νικόπουλου (με τίτλο "Αρχιτεκτονικές Δικτύων-σε-Κύκλωμα: Μία Ολιστική Σχεδιαστική Εξερεύνηση", Network-on-Chip Architectures: A Holistic Design Exploration) κέρδισε το βραβείο καλύτερης διδακτορικής διατριβής 2008-09 στην περιοχή "Νέες Κατευθύνσεις Σχεδιασμού Συστημάτων" από την Ευρωπαϊκή Ένωση Σχεδιασμού και Αυτοματοποίησης (European Design and Automation Association). Την περίοδο 2007-08, ο Δρ. Νικόπουλος εργάστηκε σαν μεταδιδακτορικός ερευνητής στο Εργαστήριο Αρχιτεκτονικής Επεξεργαστών του Ecole Polytechnique Federale de Lausanne (EPFL) στην Ελβετία. Αυτή τη στιγμή διευθύνει το Εργαστήριο Αρχιτεκτονικής Πολυπύρηνων Υπολογιστών (multicore Computer Architecture Laboratory, multiCAL) στο τμήμα ΗΜΜΥ του Πανεπιστημίου Κύπρου. Τα ερευνητικά του ενδιαφέροντα είναι στις ακόλουθες περιοχές: αρχιτεκτονική υπολογιστών, σχεδιασμός πολυπύρηνων μικροεπεξεργαστών και συστημάτων, αρχιτεκτονική υποστήριξη για υπολογιστές υψηλού βαθμού παραλληλίας (Architectural Support for Massively Parallel Computing), και αρχιτεκτονικές διασύνδεσης πάνω σε μικροκυκλώματα (Networks-on-Chip).
Αρχιτεκτονική πολυπύρηνων επεξεργαστών
Σχεδιασμός μικροεπεξεργαστών και ψηφιακών συστημάτων
Αρχιτεκτονική υποστήριξη για υπολογιστές υψηλού βαθμού παραλληλίας
Αρχιτεκτονικές διασύνδεσης πάνω σε μικροκυκλώματα (Networks-on-Chip)
Αρχιτεκτονικές ετερογενών πολυπύρηνων επεξεργαστών (Συνδυασμός CPU+GPU+Εξειδικευμένων Επιταχυντών)
Επεξεργασία γενικής χρήσης σε GPU (GPGPU)
Τρισδιάστατες αρχιτεκτονικές συστημάτων
Αναδυόμενες τεχνολογίες μνήμης
C.A. Nicopoulos, S. Srinivasan, A. Yanamandra, D. Park, N. Vijaykrishnan, C.R. Das, and M.J. Irwin, "On the Effects of Process Variation in Network-on-Chip Architectures," accepted (to appear in print; published online in 10.2008) in the IEEE Transactions on Dependable and Secure Computing (TDSC).
 
R. Das, A.K. Mishra, C.A. Nicopoulos, D. Park, N. Vijaykrishnan, R. Iyer, M.S. Yousif, C.R. Das, "Performance and Power Optimization through Data Compression in Network-on-Chip Architectures," in Proceedings of the 14th International Symposium on High-Performance Computer Architecture (HPCA), pp. 215-225, 2008.
[12 σελίδες – Κορυφαίο συνέδριο στην Αρχιτεκτονική Υπολογιστών – πολύ ανταγωνιστικό]
 
J. Kim, C.A. Nicopoulos, D. Park, R. Das, Y. Xie, N. Vijaykrishnan, and C.R. Das, "A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures," in Proceedings of the 34th Annual International Symposium on Computer Architecture (ISCA), pp. 138-149, 2007.
[12 σελίδες – Κορυφαίο συνέδριο στην Αρχιτεκτονική Υπολογιστών – πολύ ανταγωνιστικό]
 
C.A. Nicopoulos, D. Park, J. Kim, N. Vijaykrishnan, M.S. Yousif, and C.R. Das, "ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers," in Proceedings of the 39th Annual International Symposium on Microarchitecture (MICRO), pp. 333-344, 2006.
[12 σελίδες – Κορυφαίο συνέδριο στην Αρχιτεκτονική Υπολογιστών – πολύ ανταγωνιστικό]
 
F. Li, C.A. Nicopoulos, T. Richardson, Y. Xie, N. Vijaykrishnan, and M. Kandemir, "Design and Management of 3D Chip Multiprocessors Using Network-in-Memory," in Proceedings of the 33rd Annual International Symposium on Computer Architecture (ISCA), pp. 130-141, 2006.
[12 σελίδες – Κορυφαίο συνέδριο στην Αρχιτεκτονική Υπολογιστών – πολύ ανταγωνιστικό]
 
J. Kim, C.A. Nicopoulos, D. Park, N. Vijaykrishnan, M.S. Yousif, and C.R. Das, "A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks," in Proceedings of the 33rd Annual International Symposium on Computer Architecture (ISCA), pp. 4-15, 2006.
[12 σελίδες – Κορυφαίο συνέδριο στην Αρχιτεκτονική Υπολογιστών – πολύ ανταγωνιστικό]
 
D. Park, C.A. Nicopoulos, J. Kim, N. Vijaykrishnan, and C.R. Das, "Exploring Fault-Tolerant Network-on-Chip Architectures," in Proceedings of the International Conference on Dependable Systems and Networks (DSN), pp. 93-102, 2006.
[10 σελίδες – Κορυφαίο συνέδριο στην Αξιοπιστία Συστήματος – πολύ ανταγωνιστικό]

Profile Information

Chrysostomos Nicopoulos is an Assistant Professor in the Department of Electrical and Computer Engineering (ECE) at the University of Cyprus. Chrysostomos received the B.S. and Ph.D. degrees in Electrical Engineering (specializing in Computer Engineering) from the Pennsylvania State University, USA, in 2003 and 2007, respectively. As a member of the Microsystems Design Laboratory at Penn State, Chrysostomos was actively involved in the research of packet-based Networks-on-Chip (NoC) and their implementation in multicore computer architectures. His Ph.D. dissertation, titled: "Network-on-Chip Architectures: A Holistic Design Exploration," received the 2008 Outstanding Dissertation Award in the area of "New directions in logic and system design" by the European Design and Automation Association (EDAA). From 2007 to 2008, he worked as a post-doctoral research associate in the Processor Architecture Laboratory at the École Polytechnique Fédérale de Lausanne (EPFL), Switzerland. He is currently the director of the multicore Computer Architecture Laboratory (multiCAL) at the University of Cyprus. His research interests lie in the areas of: computer architecture, multi-/many-core microprocessor and system design, architectural support for massively parallel computing, and Networks-on-Chip.
Multi-/Many-Core Computer Architecture
Microprocessor & System Design
Architectural Support for Massively Parallel Computing
Architectural Challenges in Terascale Integration
Network-on-Chip (NoC) Architectures
On-Chip Interconnection Networks
Heterogeneous Architectures (Combining CPU + GPU + Custom Accelerators)
General-Purpose Computing on GPU (GPGPU) for the Acceleration of Multimedia Applications
3D System Architectures
Emerging Memory Technologies (Phase-Change RAM)
C.A. Nicopoulos, S. Srinivasan, A. Yanamandra, D. Park, N. Vijaykrishnan, C.R. Das, and M.J. Irwin, "On the Effects of Process Variation in Network-on-Chip Architectures," accepted (to appear in print; published online in 10.2008) in the IEEE Transactions on Dependable and Secure Computing (TDSC).
 
R. Das, A.K. Mishra, C.A. Nicopoulos, D. Park, N. Vijaykrishnan, R. Iyer, M.S. Yousif, C.R. Das, "Performance and Power Optimization through Data Compression in Network-on-Chip Architectures," in Proceedings of the 14th International Symposium on High-Performance Computer Architecture (HPCA), pp. 215-225, 2008.
[12 pages – Premiere conference in Computer Architecture – extremely competitive]
 
J. Kim, C.A. Nicopoulos, D. Park, R. Das, Y. Xie, N. Vijaykrishnan, and C.R. Das, "A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures," in Proceedings of the 34th Annual International Symposium on Computer Architecture (ISCA), pp. 138-149, 2007.
[12 pages – Premiere conference in Computer Architecture – extremely competitive]
 
C.A. Nicopoulos, D. Park, J. Kim, N. Vijaykrishnan, M.S. Yousif, and C.R. Das, "ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers," in Proceedings of the 39th Annual International Symposium on Microarchitecture (MICRO), pp. 333-344, 2006.
[12 pages – Premiere conference in Computer Architecture – extremely competitive]
 
F. Li, C.A. Nicopoulos, T. Richardson, Y. Xie, N. Vijaykrishnan, and M. Kandemir, "Design and Management of 3D Chip Multiprocessors Using Network-in-Memory," in Proceedings of the 33rd Annual International Symposium on Computer Architecture (ISCA), pp. 130-141, 2006.
[12 pages – Premiere conference in Computer Architecture – extremely competitive]
 
J. Kim, C.A. Nicopoulos, D. Park, N. Vijaykrishnan, M.S. Yousif, and C.R. Das, "A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks," in Proceedings of the 33rd Annual International Symposium on Computer Architecture (ISCA), pp. 4-15, 2006.
[12 pages – Premiere conference in Computer Architecture – extremely competitive]
 
D. Park, C.A. Nicopoulos, J. Kim, N. Vijaykrishnan, and C.R. Das, "Exploring Fault-Tolerant Network-on-Chip Architectures," in Proceedings of the International Conference on Dependable Systems and Networks (DSN), pp. 93-102, 2006.
[10 pages – Premiere conference in System Reliability – very competitive]